Data Structures | Typedefs | Functions
csl_dssVideoPort.h File Reference

DSS Video Port CSL FL interface file. More...

Data Structures

struct  CSL_DssVpGammaCfg
 Gamma Correction configuration for DSS Video Port Output. More...
 
struct  CSL_DssVpLcdTdmCfg
 LCD Configuration for Time Division Multiplexing. More...
 
struct  CSL_DssVpLcdSignalPolarityCfg
 Polarity of Active Video, Pixel Clock, HSync and VSync signals for the LCD. More...
 
struct  CSL_DssVpLcdAdvSignalCfg
 Advance Signal Configuration for the LCD. More...
 
struct  CSL_DssVpLcdOpTimingCfg
 Timing configuration for the LCD output. More...
 
struct  CSL_DssVpLcdBlankTimingCfg
 Blanking Timing parameters for the LCD. More...
 

Macros

Video Port CSC Position

DSS Video Port Color Space Conversion block position wrt Gamma block

#define CSL_DSS_VP_CSC_POS_AFTER_GAMMA   ((uint32_t) CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA)
 CSC block is after GAMMA correction.
 
#define CSL_DSS_VP_CSC_POS_BEFORE_GAMMA   ((uint32_t) CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA)
 CSC block is before GAMMA correction.
 
TDM Mode Unused Bits Level

State of unused bits in TDM mode for the VP output

#define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_LOW   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL)
 Low level.
 
#define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_HIGH   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL)
 High level.
 
#define CSL_DSS_VP_TDM_UNUSED_BITS_LEVEL_UNCHANGED   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED)
 Unchanged level.
 
TDM Cycle format

#define CSL_DSS_VP_TDM_CYCLE_1PERPIXEL   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX)
 1 cycle per pixel
 
#define CSL_DSS_VP_TDM_CYCLE_2PERPIXEL   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX)
 2 cycles per pixel
 
#define CSL_DSS_VP_TDM_CYCLE_3PERPIXEL   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX)
 3 cycles per pixel
 
#define CSL_DSS_VP_TDM_CYCLE_3PER2PIXEL   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX)
 3 cycles per 2 pixels
 
Output interface width in TDM mode

#define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_8BIT   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT)
 8-bit parallel output interface selected
 
#define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_9BIT   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT)
 9-bit parallel output interface selected
 
#define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_12BIT   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT)
 12-bit parallel output interface selected
 
#define CSL_DSS_VP_TDM_PARALLEL_OUTPUT_16BIT   ((uint32_t) CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT)
 16-bit parallel output interface selected
 
LCD HSync VSync Alignment

#define CSL_DSS_VP_HVSYNC_NOT_ALIGNED   ((uint32_t) CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED)
 HSYNC and VSYNC are not aligned.
 
#define CSL_DSS_VP_HVSYNC_ALIGNED   ((uint32_t) CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED)
 HSYNC and VSYNC assertions are aligned.
 
LCD HSYNC/VSYNC pixel clock control

#define CSL_DSS_VP_HVCLK_CONTROL_OFF   ((uint32_t) CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK)
 HSYNC and VSYNC are driven on opposite edges of the pixel clock than pixel data.
 
#define CSL_DSS_VP_HVCLK_CONTROL_ON   ((uint32_t) CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16)
 HSYNC and VSYNC are driven according to hVClkRiseFall value.
 
Delta Lines Per Panel

Delta size value of the odd field compared to the even field

#define CSL_DSS_VP_LPP_DELTA_ZERO   ((uint32_t) CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME)
 Odd field has same size as even.
 
#define CSL_DSS_VP_LPP_DELTA_PLUSONE   ((uint32_t) CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE)
 Odd field is equal to even field + 1.
 
#define CSL_DSS_VP_LPP_DELTA_MINUSONE   ((uint32_t) CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE)
 Odd field is equal to even field - 1.
 
Video Port First Field

First Field to Video Port output in case of interlace mode

#define CSL_DSS_VP_FID_FIRST_EVEN   ((uint32_t) CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN)
 First field is even.
 
#define CSL_DSS_VP_FID_FIRST_ODD   ((uint32_t) CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD)
 First field is odd.
 
Video Port Stall Mode

The type of transfer in Stall mode

#define CSL_DSS_VP_STALL_MODE_COMMAND   ((uint32_t) CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_COMMANDMODE)
 Stall mode is command.
 
#define CSL_DSS_VP_STALL_MODE_VIDEO   ((uint32_t) CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_VIDEOMODE)
 Stall mode is video.
 

Typedefs

typedef CSL_dss_vp1Regs CSL_dss_vpRegs
 DSS Video Port Registers. More...
 

Functions

void CSL_dssVpEnable (CSL_dss_vpRegs *vpRegs, uint32_t enable)
 Enable the DSS Video Port. More...
 
void CSL_dssVpSetGoBit (CSL_dss_vpRegs *vpRegs)
 GO Command for the VP output. It is used to synchronize the pipelines associated with the VP output. More...
 
void CSL_dssVpSetLcdTdmConfig (CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdTdmCfg *lcdTdmCfg)
 Configure the LCD TDM(Time division multiplexing) parameters. More...
 
void CSL_dssVpSetLcdLineNum (CSL_dss_vpRegs *vpRegs, uint32_t lineNum)
 Set the Line Number at which the interrupt should be generated. More...
 
uint32_t CSL_dssVpGetLcdLineNum (const CSL_dss_vpRegs *vpRegs)
 Get the number of line currently displayed. More...
 
int32_t CSL_dssVpSetLcdOpTimingConfig (CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdOpTimingCfg *lcdCfg)
 Configure the LCD Timing parameters. More...
 
int32_t CSL_dssVpSetLcdBlankTiming (CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdBlankTimingCfg *blankCfg, uint32_t dvoFormat, uint32_t scanFormat, uint32_t isCustomTiming)
 Configure the LCD Blank Timing parameters. More...
 
void CSL_dssVpSetLcdAdvSignalConfig (CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdAdvSignalCfg *advSignalCfg)
 Configure the advance LCD Signal parameters. More...
 
void CSL_dssVpSetLcdSignalPolarityConfig (CSL_dss_vpRegs *vpRegs, const CSL_DssVpLcdSignalPolarityCfg *polarityCfg)
 Configure the Polarity of LCD signals(HSYNC, VSYNC, PCLK, Data) More...
 
void CSL_dssVpEnableTvGamma (CSL_dss_vpRegs *vpRegs, const CSL_DssVpGammaCfg *gammaCfg)
 Enable/Bypass TV Gamma Table. More...
 
void CSL_dssVpSetCSCCoeff (CSL_dss_vpRegs *vpRegs, const CSL_DssCscCoeff *cscCoeff, uint32_t cscPos, uint32_t cscEnable)
 Configure the coefficients for Color Space Conversion. More...
 
void CSL_dssVpSetSafetySignSeedVal (CSL_dss_vpRegs *vpRegs, uint32_t signSeedVal)
 Set the seed value for the signature calculation. More...
 
void CSL_dssVpSetSafetyReferenceSign (CSL_dss_vpRegs *vpRegs, uint32_t referenceSign, uint32_t regionId)
 Set the reference safety signature for data correctness check. More...
 
void CSL_dssVpSetSafetyChkConfig (CSL_dss_vpRegs *vpRegs, const CSL_DssSafetyChkCfg *safetyCfg, uint32_t regionId)
 Configure the Safety Check parameters. More...
 
uint32_t CSL_dssVpGetSafetySign (const CSL_dss_vpRegs *vpRegs, uint32_t regionId)
 Get the Safety Signature of the sub region. More...
 
void CSL_dssVpStallModeEnable (CSL_dss_vpRegs *vpRegs, uint32_t enable, uint32_t stallModeType)
 Enable/disable the Video Port stall mode. More...
 
static void CSL_dssVpGammaCfgInit (CSL_DssVpGammaCfg *gammaCfg)
 CSL_DssVpGammaCfg structure init function. More...
 
static void CSL_dssVpLcdTdmCfgInit (CSL_DssVpLcdTdmCfg *tdmCfg)
 CSL_DssVpLcdTdmCfg structure init function. More...
 
static void CSL_dssVpLcdSignalPolarityCfgInit (CSL_DssVpLcdSignalPolarityCfg *polarityCfg)
 CSL_DssVpLcdSignalPolarityCfg structure init function. More...
 
static void CSL_dssVpLcdAdvSignalCfgInit (CSL_DssVpLcdAdvSignalCfg *advSignalCfg)
 CSL_DssVpLcdAdvSignalCfg structure init function. More...
 
static void CSL_dssVpLcdOpTimingCfgInit (CSL_DssVpLcdOpTimingCfg *lcdCfg)
 CSL_DssVpLcdOpTimingCfg structure init function. More...
 
static void CSL_dssVpLcdBlankTimingCfgInit (CSL_DssVpLcdBlankTimingCfg *blankCfg)
 CSL_DssVpLcdBlankTimingCfg structure init function. More...
 

Detailed Description

DSS Video Port CSL FL interface file.


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